1. Field of the Invention
This invention relates to a bus connection system for a data transmission and reception between a central processing unit and a memory, an input/output control circuit or like peripheral circuit are performed via a bus.
2. Description of the Prior Art
A data processor unit of the type that a central processing unit printed circuit board and peripheral circuit printed boards carrying a memory, an input/output control circuit and so forth are connected by means of a back panel usually has such an arrangement as shown in FIG. 1, for example. FIG. 1 indicates a central processing unit 1, a driver 2, a receiver 3, a central processing unit printed circuit board 4, peripheral circuit printed circuit board 6 to 9, and a bus 5 of a back panel. A control signal a for the driver 2 and a control signal b for the receiver 3 are provided from the central processing unit 1 when the central processing unit 1 transmits or receives data.
The printed circuit boards 4 and 6 to 9 are interconnected via the bus 5 by inserting their connecting portions 11', 12' and 13' into connectors 11 and power source connectors 12 and 13 which are connected with the bus 5 of the back panel 10, as shown in FIGS. 2A and 2B.
With such a conventional arrangement, however, the number of peripheral circuit printed circuit boards which can be connected to the bus 5 is limited by the number of fan-outs of the driver 2 loaded on the central processing unit printed circuit board 4, an increase in delay of signal transmission caused by an increase in the bus length and the throughput of the central processing unit 1.